OpenCSD - CoreSight Trace Decode Library 1.5.5
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trc_tgt_mem_access_i.h
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1/*
2 * \file trc_tgt_mem_access_i.h
3 * \brief OpenCSD : Target memory read interface.
4 *
5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
6 */
7
8/*
9 * Redistribution and use in source and binary forms, with or without modification,
10 * are permitted provided that the following conditions are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright notice,
13 * this list of conditions and the following disclaimer.
14 *
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 *
19 * 3. Neither the name of the copyright holder nor the names of its contributors
20 * may be used to endorse or promote products derived from this software without
21 * specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#ifndef ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED
36#define ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED
37
57{
58public:
60 virtual ~ITargetMemAccess() {};
81 virtual ocsd_err_t ReadTargetMemory( const ocsd_vaddr_t address,
82 const uint8_t cs_trace_id,
83 const ocsd_mem_space_acc_t mem_space,
84 uint32_t *num_bytes,
85 uint8_t *p_buffer) = 0;
86
93 virtual void InvalidateMemAccCache(const uint8_t cs_trace_id) = 0;
94};
95
96
97#endif // ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED
98
99/* End of File trc_tgt_mem_access_i.h */
Interface to target memory access.
virtual ocsd_err_t ReadTargetMemory(const ocsd_vaddr_t address, const uint8_t cs_trace_id, const ocsd_mem_space_acc_t mem_space, uint32_t *num_bytes, uint8_t *p_buffer)=0
virtual void InvalidateMemAccCache(const uint8_t cs_trace_id)=0
enum _ocsd_mem_space_acc_t ocsd_mem_space_acc_t
enum _ocsd_err_t ocsd_err_t
uint64_t ocsd_vaddr_t